If we go based on the recent past, then the median should be 14, 15,16, 17, 18, 19. Based on the article below, it should be mid-high single digits for this year, which would be 13%. I'm going to start there do 1% increases premium for the first two halves after, then make it 2% based on Chinese government support for new foundries and the chip manufacturing with more new fabs coming on line.
Nevertheless, Zhao noted the firm intends to increase its output at its 12-inch fab by 10,000 wafers per month. It also plans on ramping up production at its 8-inch factory by 45,000 units. However, its procurement challenges will prevent it from making those upgrades until the second half of 2021.
Ultimately, the company expects its sourcing issues to limit its annual growth to the “mid-to-high” single digits this year.
I didn't, but I think this gets at the difference between inches in wafer size.
"Interestingly, the move from 100mm (4 inch) wafers to 150mm (6 inch) wafers increased the silicon area by 125 percent — the same relative gain that will be realized when semiconductor companies make the transition from today’s 200mm (8 inch) wafers to 300mm (12 inch). Beyond 300mm, the same gain requires a jump to 450mm [18 inch] wafers."[1]
I'd guess that reducing the chip nm size would allow for further gains from having more chips per wafer.
If we go based on the recent past, then the median should be 14, 15,16, 17, 18, 19. Based on the article below, it should be mid-high single digits for this year, which would be 13%. I'm going to start there do 1% increases premium for the first two halves after, then make it 2% based on Chinese government support for new foundries and the chip manufacturing with more new fabs coming on line.
Nevertheless, Zhao noted the firm intends to increase its output at its 12-inch fab by 10,000 wafers per month. It also plans on ramping up production at its 8-inch factory by 45,000 units. However, its procurement challenges will prevent it from making those upgrades until the second half of 2021.
Ultimately, the company expects its sourcing issues to limit its annual growth to the “mid-to-high” single digits this year.
https://www.theburnin.com/industry/smic-plants-fully-loaded-building-12b-sub-14nm-foundry-2021-02-16/
Do you know what's the relation between the inches in the fab and the nm in the transistor?
I didn't, but I think this gets at the difference between inches in wafer size.
"Interestingly, the move from 100mm (4 inch) wafers to 150mm (6 inch) wafers increased the silicon area by 125 percent — the same relative gain that will be realized when semiconductor companies make the transition from today’s 200mm (8 inch) wafers to 300mm (12 inch). Beyond 300mm, the same gain requires a jump to 450mm [18 inch] wafers."[1]
I'd guess that reducing the chip nm size would allow for further gains from having more chips per wafer.
[1] http://smithsonianchips.si.edu/ice/cd/CEICM/SECTION7.pdf